This invention relates to a temperature managing apparatus and method for simultaneously managing the temperatures of objects to be temperature controlled contained in a plurality of containers.
Further, the invention relates to a temperature managing apparatus and method for simultaneously managing the temperatures of objects to be temperature controlled serving as heat generators for generating heat.
Furthermore, the invention relates to a temperature managing apparatus wherein the objects to be temperature controlled each consist of an integral object (hereinafter referred to as a "shell") obtained by integrally forming a contactor, a semiconductor wafer (hereinafter referred to as a "wafer") and a wafer chuck by a vacuum force, and wherein the containers are each used as a test room for performing tests such as a reliability test, an electric characteristic test, etc. of a plurality of semiconductor elements (hereinafter referred to as "IC chips") formed on the wafer.
In the above-mentioned reliability test, thermo-stress and electrical stress are applied to packaged IC chips, thereby to detect latent defects therein and then to eliminate defective IC chips. IC chips have been and are now more and more miniaturized and highly integrated in accordance with miniaturization and/or functionalization of electric products. Moreover, to further decrease the size of semiconductor products, various IC-chip mounting techniques are now being developed. In particular, a technique for mounting so-called bear chips that are not packaged have been and are being developed. Before putting bear chips on the market, they must be subjected to a reliability test. In the conventional reliability test, however, various problems, which include a problem of electrical connection between a bear chip and a socket, have to be solved before the test. Further, the conventional reliability test may require lots of time and effort and hence a high cost since small bear chips are handled therein.
In light of this, a technique for testing the reliability of IC chips, which are in a wafer state, is now proposed in, for example, Japanese Patent Application KOKAI Publications Nos. 7-231019, 8-5666 and 8-340030. In particular, the first and second publications propose a technique for simultaneously bringing, when testing the reliability of a wafer, the contacts of the wafer into contact with those of a contactor (e.g. a probe sheet) in a reliable manner even under the influence of heat. In order to secure the accuracy of the test for testing the reliability of IC chips provided on a wafer, it is very important to put, as mentioned above, the contacts of the wafer into simultaneous and accurate contact with those of a contactor at a high temperature. Moreover, a technique for efficiently heating a wafer to a predetermined test temperature in, for example, a constant-temperature bath used for the reliability test, and accurately maintaining the wafer at the test temperature is also very important.
Although various techniques are necessary for the reliability test for testing IC chips in a wafer state, in which the contacts of the wafer are simultaneously put into contact with those of a contactor, have been proposed so far, there is no satisfactory technique for maintaining the wafer at a predetermined test temperature in a container such as a constant-temperature bath. Under these circumstances, the applicant of this invention proposed, in the specification of Japanese Patent Application No. 9-318920, a technique for maintaining a wafer at a constant test temperature when performing a reliability test. More specifically, the proposed invention relates to a technique for maintaining the temperature of a wafer contained in a wafer container at a constant value. In this proposed invention, however, to simultaneously control the temperatures of a plurality of to-be-tested objects each contained in a corresponding one of containers is left as a technique to be developed.